Technical Field
The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device.
Background Art
Silicon carbide (SiC) exhibits various advantageous physical properties in comparison with silicon (Si), such as a bandgap that is approximately three times greater, a dielectric breakdown field strength that is nearly an order of magnitude greater, and a high saturated drift velocity for electrons. Therefore, although silicon has been widely used as the material for conventional power semiconductor devices, using silicon carbide as the material for power semiconductor devices is effective in terms of achieving performance that exceeds that of silicon power semiconductor devices.
Moreover, in the field of vertical metal-oxide-semiconductor field effect transistor (MOSFET) switching devices, two conventionally well-known MOS gate structures are the planar gate structure (in which a planar MOS gate is formed on a semiconductor substrate) and the trench gate structure (in which a MOS gate is buried within a trench formed in a semiconductor substrate).
In recent vertical power semiconductor devices, the trench gate structure has attracted attention. In the trench gate structure, the channel is formed orthogonal to the substrate front surface, thereby making it possible to reduce the cell width to a greater extent than in the planar gate structure, in which the channel is formed parallel to the substrate front surface. This makes it possible to increase the cell density per unit area and thus makes it possible to increase the current density per unit area, which is advantageous from a cost perspective.
For these reasons, the trench gate structure has gradually become more common than the planar gate structure even in silicon vertical MOSFETs. Therefore, similar to in silicon vertical MOSFETs, there is demand to ultimately use the trench gate structure in silicon carbide vertical MOSFETs.
However, using the trench gate structure in silicon carbide vertical MOSFETs typically results in a more significant decrease in channel mobility than in silicon vertical MOSFETs due to the negative effects of residual carbon (C) near the channel as well as the difficulty of forming the trench gate structure itself. This increases the channel resistance and reduces the advantages of using silicon carbide over using silicon. Strategies for reducing the channel resistance include decreasing the channel length as well as decreasing the impurity concentration of the portions of the base region that run along the sidewalls of the trench where the channel forms in order to facilitate inversion of the channel polarity, for example. However, decreasing the channel length reduces the distance between the drift region and the source region, which can potentially make the device more prone to punchthrough (a phenomenon in which current flows between the source and drain when no gate voltage is applied) and reduce the breakdown voltage (withstand voltage).
Moreover, decreasing the impurity concentration of the base region makes it easier for the majority carrier depletion layer (channel) to expand into the base region from the boundary between the gate insulating film and the base region when a gate voltage is applied. This reduces the strength of the electric field applied to the channel, which makes it more difficult to increase the minority carrier density in the channel; means that a higher gate voltage must be applied in order to increase the minority carrier density in the channel and invert the polarity of the channel; and reduces the decrease in gate threshold voltage achieved by decreasing the impurity concentration of the base region. In other words, when focusing on gate threshold voltage, to increase the gate threshold voltage, the impurity concentration of the base region must be sufficiently increased, which can result in an excessive increase in channel resistance. Meanwhile, when decreasing the gate threshold voltage, an excessive decrease in the impurity concentration of the base region can potentially result in a decrease in breakdown voltage. Here, “breakdown voltage” refers to the voltage at which avalanche breakdown occurs.
One example of a previously proposed silicon carbide vertical trench gate MOSFET is an n-channel MOSFET in which a high electron mobility n-type region is formed along the inner walls of the trench to reduce channel resistance (see Patent Document 1 (paragraph [0032] and FIG. 1), for example). In Patent Document 1, the portions of the p-type base region that run along the sidewalls of the trench (which contribute to determining the gate threshold voltage) are converted to n-type to reduce the channel resistance.
Another example of a previously proposed silicon carbide vertical trench gate MOSFET is a device in which silicon carbide is used as the semiconductor material, the width of p-type base regions sandwiched between adjacent trenches is decreased, and the impurity concentration of those p-type base regions is also decreased (see Patent Document 2 (paragraphs [0033] to [0034 and FIGS. 1 to 3), for example). In Patent Document 2, decreasing the width of the p-type base regions inhibits expansion of the majority carrier depletion layers and thereby prevents a decrease in breakdown voltage.